I. Technical Field
The embodiments described herein relate to semiconductor design technology and, more particularly, to a digital-to-analog converter and an apparatus for on-die termination using the same.
II. Related Art
A conventional digital-to-analog converter can be classified into two types, a first type which converts PCODE (a kind of digital code) into an analog voltage signal and a second type which converts two kinds of digital codes PCODE and NCODE into an analog voltage signal.
As shown in FIG. 1, the first type of digital-to-analog converter includes a plurality of circuit sets, each of which has a NAND gate (ND10), and a driver leg 10 to be connected to external resistor (ZQ). When an enable signal “EN” is activated to a high level, a digital code PCODE<i> (i=0 to N) is input to a gate of the transistor (M10) in the driver leg 10. When the digital code PCODE<i> is activated to a low level, the corresponding driver leg 10 is selected.
An analog voltage signal “Vpcode” is output by dividing a power supply voltage (VDDQ) in proportion to the voltage division ratio which is conducted by resistance elements consisting of the resistor (R10) and the fully turned-on transistor (M10) in the driver leg 10 and the external resistor (ZQ).
As shown in FIG. 2, the second type of digital-to-analog converter includes a plurality of circuit sets, each of which has a NAND gate (ND20) and a driver leg 20.
When an enable signal “EN” is activated to a high level, the digital code PCODE<i> is input to a gate of the transistor (M20) in the driver leg 20. The digital code NCODE<i> is input to a gate of the transistor (M21) in the driver leg 20 regardless of the enable signal “EN.”
When the digital codes PCODE<i> and NCODE<i> are respectively activated to low and high levels, an analogue voltage signal (Vpcode) is output by dividing a power supply voltage (VDDQ) in a proportion to the voltage division ratio which is conducted by resistance elements consisting of resistors (R20) and (R21) and the fully turned-on transistors (M20) and (M21) in the driver leg 10.
In an on-die termination apparatus, the configuration shown in FIG. 2 can be used for calibrating another digital code NCODE based on the calibrated digital code PCODE of the calibration that is executed in the digital-to-analog converter.
However, according to the conventional on-die termination apparatus, since digital codes PCODE<i> and NCODE<i> are in a voltage level of the power supply voltage or a ground voltage level, the transistors (M10), (M20) and (M21) in the driver legs 10 and 20 cannot be finely controlled. These transistors are controlled only in full turn-on/off operations. The resistance can be disregarded when transistors (M10), (M20) and (M21) are fully turned on. Accordingly, since the resistance values in driver legs 10 and 20 are determined only by the passive elements (resistors (R10), (R20) and (R21)), it is not possible to finely control the resistance values and the resistance values are limited to a narrow adjustment range. Furthermore, since the resistance values in the driver legs 10 and 20 are limited to a narrow adjustment range, the number of driver legs 10 and 20 is increased in order to enlarge the adjustment range of the resistance values and the increased number of the driver legs causes an increase in the chip area of the semiconductor device.